In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29-31, 2012, 2012-08-29 - 2012-08-31, Torino, Olaszország.
Investigation of area and speed trade-offs in FPGA implementation of an image correlation algorithm
In: 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012, Tallinn, 18-20 April 2012, 2012-04-18 - 2012-04-20, Tallinn, Észtország.
Test and configuration architecture of a sub-THz CMOS detector array