In: 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012, Tallinn, 18-20 April 2012, 2012-04-18 - 2012-04-20, Tallinn, Észtország.
Test and configuration architecture of a sub-THz CMOS detector array
In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29-31, 2012, 2012-08-29 - 2012-08-31, Torino, Olaszország.
Automatic generation of locally controlled arithmetic unit via floorplan based partitioning
In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29-31, 2012, 2012-08-29 - 2012-08-31, Torino, Olaszország.
Memory access optimization for computations on unstructured meshes
In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29-31, 2012, 2012-08-29 - 2012-08-31, Torino, Olaszország.
In: 22nd International Conference on Field Programmable Logic and Applications, FPL 2012, Oslo, 29-31 August 2012, 2012-08-29 - 2012-08-31, Oslo, Norvégia.
FPGA based acceleration of computational fluid flow simulation on unstructured mesh geometry
In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29-31, 2012, 2012-08-29 - 2012-08-31, Torino, Olaszország.